aiQu LABS

Prototypes we build before a client asks.

Internal R&D on edge models, hybrid solvers and sensing. Open notes, honest negative results.

CHARTER

De-risk the method on our own time.

Labs is where we de-risk methods on our own time. Each track has a question, a rig and a stopping rule. When something works we write it up; when it does not, we write that up too — negative results are the cheapest thing we can give a client.

  • 01Every track states its question in one sentence before any code is written.
  • 02Every track has a stopping rule, so nothing runs on momentum alone.
  • 03Negative results get written up. They are the cheapest thing we can hand a client.
  • 04Nothing from Labs is sold as production-ready until it has survived a real deployment.

ACTIVE TRACKS

Six questions currently on the bench.

Status is honest: active means someone is on it this month.

  • Active

    Sub-watt inspection models

    The question

    How small can a usable defect classifier get before accuracy falls off a cliff?

    Quantisation and distillation experiments targeting vision MCUs, profiled on-device rather than estimated. TODO: publish the accuracy-versus-power curve.

  • Active

    Acoustic anomaly rigs

    The question

    Can a cheap microphone array replace a contact vibration sensor for early fault detection?

    Bench rig with induced bearing faults, comparing acoustic and accelerometer baselines across load conditions. TODO: publish rig design and dataset.

  • Prototype

    Hybrid solver harness

    The question

    What does an honest benchmark harness for quantum versus classical solvers look like?

    A fixed test suite of scheduling and routing instances, run across classical, quantum-inspired and QPU-backed solvers with identical time budgets.

  • Prototype

    Grounded plant copilot

    The question

    How do you stop a maintenance assistant from confidently inventing a procedure?

    Retrieval over a synthetic SOP corpus with citation enforcement and refusal behaviour measured as a first-class metric.

  • Paused

    PQC on constrained devices

    The question

    Which post-quantum schemes actually fit in the flash and RAM budget of a field device?

    Footprint and handshake-latency measurements for PQC key exchange on representative microcontrollers. Paused pending hardware.

  • Active

    Synthetic defect generation

    The question

    Can synthetic defects cut the labelled data a new SKU needs?

    Procedural and generative defect synthesis, evaluated by how much real labelled data it displaces at fixed accuracy. TODO: publish results.

Collaboration

We co-develop with plants, and with academic groups.

If you have a process that is hard to instrument, a failure mode nobody has modelled, or a dataset that cannot leave your site, that is an interesting problem and we would like to hear about it. Joint R&D terms are negotiable, including IP shared on the output.

TODO: add published papers, datasets and open-source repositories

NEXT STEP

Have a problem worth putting on the bench?

Labs collaborations start as a conversation, not a contract.